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Develop and refine the DVA1622 loader


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4 hours ago, yorkman said:
5 hours ago, IG-88 said:

maybe re-read the howto for configuring the 7.x loader again, there is a part where the sn is configured (usually as random generated but there is also a option to manually enter one and thats where you have to go)

 

alternativ is to uninstall SS and install the old version manually as spk file

https://archive.synology.com/download/Package/SurveillanceStation/9.0.2-10061

"SurveillanceStation-x86_64-9.0.2-10061_openvino.spk"

 

If I can find the config file to update (user_config.json?), what serial number am I supposed to enter manually? And do I need to do anything on my real DS920+ or just update the sn# in the DVA1622, reboot and that's it and I can use the latest SS version (currently 9.1.0)?

 

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Actually I rebooted my dva1622 vm and went into build mode from the menu...I checked the user_config.json file and the sn# matches what I see in DSM info so it's already using the real sn? I also checked the grub SATA option and see the sn# matches what is shown in DSM info so I guess it's already set to the real sn but if that's the case why did it still break my licenses?

Edited by yorkman
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7 hours ago, yorkman said:

Actually I rebooted my dva1622 vm and went into build mode from the menu...I checked the user_config.json file and the sn# matches what I see in DSM info so it's already using the real sn? I also checked the grub SATA option and see the sn# matches what is shown in DSM info so I guess it's already set to the real sn but if that's the case why did it still break my licenses?

Inside build mode, you just a to launch again the Serial generation menu, and instead of generate it automatically, just chose to set it manually. and type it yourself.

Then build the loader again (it will only rebuild ramdisk) and you will be able to boot to the loader.

 

Of course, we state you've read recent posts and saw you have to manually fix the serial trigram...

Edited by Orphée
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3 hours ago, Orphée said:

Inside build mode, you just a to launch again the Serial generation menu, and instead of generate it automatically, just chose to set it manually. and type it yourself.

Then build the loader again (it will only rebuild ramdisk) and you will be able to boot to the loader.

 

Of course, we state you've read recent posts and saw you have to manually fix the serial trigram...

Thanks, but what serial generation menu? The steps I followed when I first did this about a year ago didn't mention anything about a menu. I believe there was a command that you can run and it generates a random or real MAC address and that's it. Isn't the serial number also the trigram or are those 2 different things that need to be updated? From what I understood in the previous posts is that I just change the SJR part of the serial to UBR and then I build the loader (./rploader.sh build) command or something.

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TCRP has been updated with fixed UBR serial trigram for DVA1622

https://github.com/pocopico/tinycore-redpill/commit/554b8bafe28edc62f3eee828e2b2d47bfa59a617

 

You just have to update your loader to latest TRCP release and use corresponding serial generator command and then rebuild.

 

For those using ARPL (like I do) the loader is not updated/fixed yet and you have to type the SN manually.

Edited by Orphée
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23 hours ago, yorkman said:

I tried downloading the SS version I previously had so that I could manually reinstall but it always says something like archive damaged or corrupted. So I found the spk file of the exact same version I downloaded (I still had it on my pc from when I first did the install) and that one worked fine on my DS920+, and it's exact the same filename so obviously Synology changed something in their downloadable spk'

details?

 

On 4/2/2023 at 10:29 PM, IG-88 said:

"SurveillanceStation-x86_64-9.0.2-10061_openvino.spk"

see the "openvino" at the end of the filename, thats a different version for dva1622 as it would be for other "normal" dsm systems, dva's are more special in some regards (and more expansive irl as they pack more features)

23 hours ago, yorkman said:

I don't recall updating the grub.cfg file before.

that was for 6.x loaders, the new brand of 7.x loaders are derived from a different base and have all settings collected in a xml file and when "building" the loader the information collected there will be spread to the places it needs to be (like the kernel start parameter in case of the SN)

 

using the former SS version (and then not updating to the new) was to save the hassle of redoing anything with the loader

if you dont know much about the loader you might do backups of the usb flash driver too on dsm updates (on dsm updates the new kernel is written to the loader and the loader also contains your file used to build the loader)

Edited by IG-88
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7 hours ago, Orphée said:

For those using ARPL (like I do) the loader is not updated/fixed yet and you have to type the SN manually.

arpl comes with a nice fullscrenn editot for the config file in the advanced options, kind of easy to see the SN there and change it (and then rebuild the loader and start it)

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9 hours ago, Orphée said:

TCRP has been updated with fixed UBR serial trigram for DVA1622

https://github.com/pocopico/tinycore-redpill/commit/554b8bafe28edc62f3eee828e2b2d47bfa59a617

 

You just have to update your loader to latest TRCP release and use corresponding serial generator command and then rebuild.

 

For those using ARPL (like I do) the loader is not updated/fixed yet and you have to type the SN manually.

This is great. I went on with the redpill update on my DVA1622 vm with the steps listed at the link you posted. I did however use the option 'realmac' instead of generating a new one (this preserved my previous mac since that is what I used then too). I then completed the SS update to 9.1.0-10660 on dva1622 as well as my physical nas. This solved the licenses problem. 

 

I really appreciate your help. Thank you.

Edited by yorkman
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Le 17/08/2022 à 23:50, dimakv2014 a dit :

Check your camera connection (cable and so on), also check your cable to nas maybe bad connector or damanged cable, change to different cable, use rj45 tester at least, I had same problem with poe splitter and hikvision camera, once I connected it sapperatly via single poe problem was gone, in my case it was faulty poe splitter, also if you connect your dva1622 to a slow network it will have problem because of slow bandwidth (for example cheap cable or powerline adapter 100mbit) cameras as well as recording will be glitchy. Also make sure your ethernet cable is not damaged in between camera and router, if its wifi cam signal maybe low and you will need to bring it closer to a router or use repeater, also it maybe router issue, settings or bad router which disconnects for a short time, also it maybe faulty camera that overheats and shuts itself down. Basicaly it could be anything but I can assure you redpill dva1622 as well as dva3221 works stable with no disconnects about a month now. So its not the loader problem. But to find exacly what can be wrong we need more info on your system, camera brand and model, wired or wireless, class of cable, distance of camera from router/switch (in meters), router/switch model, how many cams currently, has it appeared before, did you make any changes to your network setup, what type of connection you use to connect cam to nas: wifi, poe, direct, remote, vm or baremetal (if vm it could be problem with virtual network adapter, wrong network adapter in .vmx file) and so on. The more details you provide, the faster you will find a solution to your problem.

Dear @dimakv2014, I m about getting equipped with dva 1622, poe switch and 8cams hikvision ds-2cd2t47g2 (4mp) and 87g2 (8mp) with acusence linked with cat 7 cables (max 70 m). I plan to locate the cams at 2.5m height and 15 degrees (as stated by synology). 1/do you think the face recognition will be efficient? (I don't want to put 5k€ if it gets hard to work) 2/l would also use it for getting access to the gate of my house, do you think it's feasible to order the gate to open using a dry contact? (instant shutting signal as a push button would do). If you could provide me your feelings, it would help me a lot! Please excuse my poor English. Regards. Olivier lemonnier : lesgabonais@hotmail.com

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49 minutes ago, Lol76 said:

Dear @dimakv2014, I m about getting equipped with dva 1622, poe switch and 8cams hikvision ds-2cd2t47g2 (4mp) and 87g2 (8mp) with acusence linked with cat 7 cables (max 70 m). I plan to locate the cams at 2.5m height and 15 degrees (as stated by synology). 1/do you think the face recognition will be efficient? (I don't want to put 5k€ if it gets hard to work) 2/l would also use it for getting access to the gate of my house, do you think it's feasible to order the gate to open using a dry contact? (instant shutting signal as a push button would do). If you could provide me your feelings, it would help me a lot! Please excuse my poor English. Regards. Olivier lemonnier : lesgabonais@hotmail.com

If you want to have 1 camera with face recognition maybe, but for 6 I think you should look at dva3221 (because I don't think it will be possible to do all 8 with 8mp cameras on a single server) and dva3221 is only 150-200€ more for gpu gtx1650 and maybe extra cooling. As for gate it should be working if camera has outputs for the gate lock. If I understood your question correctly :)

P.S I am not the only one on this forum who can provide advice on this technical question) if you ask if loaders will work, they work the same way as an official synology dva box, so it more depends on how many cams you need on face rec and if cameras have digital or analog outputs. But overall 1 cam on face rec - dva1622 and 6 cameras with face rec - dva3221 should work good.

Edited by dimakv2014
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image.thumb.png.b2b889840036a33f0d3e356860fbd549.png

 

The DVA1622 is very limited if you expect to have more than 1 AI camera featured.

 

The GTX1650 from DVA3221 can handle 12 task instead of 2 for the DVA1622.

 

And as described, if you use facial recongition, it is only 1 task available on DVA1622... so you will have to choose wisely wich of your cams will benefit of the only 1 task available.

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2 hours ago, Orphée said:

The DVA1622 is very limited if you expect to have more than 1 AI camera featured.

 

The GTX1650 from DVA3221 can handle 12 task instead of 2 for the DVA1622.

 

And as described, if you use facial recongition, it is only 1 task available on DVA1622... so you will have to choose wisely wich of your cams will benefit of the only 1 task available.

 

the original geminilake cpu might have more limits then a newer "full" cpu (lets say a 10th gen cpu as the newest working for dva1622) from the point of what the hardware is capable of

if dva1622 limit is not implemented as license limit then it might be possible to test how much more is possible with intel qsv on a newer/better cpu

 

the name of the dva1622 SurveillanceStation package indicates that openvino is used so it might be possible to do a estimate when looking into whats possible with openvino and newer intel cpu's and face recognition

 

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It might be true, but I personally have a i9-9900k (3E98), so a 9th gen, 10th gen addon make it works for HW transcoding, but surveillance station AI task crash constantly with core dump every few secs ...

For me currently I'm not sure SS AI works with other CPU than 4th to 8th gen...

 

It may need more newer cpus to be tested to confirm

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1 hour ago, IG-88 said:

 

the original geminilake cpu might have more limits then a newer "full" cpu (lets say a 10th gen cpu as the newest working for dva1622) from the point of what the hardware is capable of

if dva1622 limit is not implemented as license limit then it might be possible to test how much more is possible with intel qsv on a newer/better cpu

 

the name of the dva1622 SurveillanceStation package indicates that openvino is used so it might be possible to do a estimate when looking into whats possible with openvino and newer intel cpu's and face recognition

 

Imagine if it would be possible to use Intel Arc gpu ) it would probably handle 16 tasks easy (8 face rec)

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On 4/7/2023 at 10:19 AM, Orphée said:

It might be true, but I personally have a i9-9900k (3E98), so a 9th gen, 10th gen addon make it works for HW transcoding, but surveillance station AI task crash constantly with core dump every few secs ...

For me currently I'm not sure SS AI works with other CPU than 4th to 8th gen...

 

It may need more newer cpus to be tested to confirm

AI in SS does not work with my 10th gen CPU, Intel Core i5-10400T (Comet Lake).

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1 hour ago, reboot said:

AI in SS does not work with my 10th gen CPU, Intel Core i5-10400T (Comet Lake).

Thats very strange, you do have UHD630 iGPU which used in 8th and 9th gen cpus as well, my i7-8700k has exactly same igpu in it and AI worked perfectly on earlier versions of loader, maybe it's like with Nvidia drivers if gpu is not on the list it wont get recognized (in your case its cpu). Its probably because of different device ids in my case its 0x3E92 in your igpu its 0x9BC8 which is probably not in synology's driver's list. It has some differences but still considered to be same 9.5 gen igpu but because of more newer architecture it has different device id which was not added to synology at the time of dva1622 development. So unfortunately for now at least as Orphee suggested its only 4th-8th gen of cpu supported for AI. Alternatively I ve read that people can fake gpu device ids in virtual environment using hypervisors such as Proxmox.

IMG_20230409_183128.jpg

Edited by dimakv2014
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47 minutes ago, dimakv2014 said:

Alternatively I ve read that people can fake gpu device ids in virtual environment using hypervisors such as Proxmox

Where did you read it please ? I could try it.

 

Edit :

OMG I did not expect that to be so easy for my 9th gen CPU :

image.thumb.png.9f51e7d53aacc23f08a6a829facf14be.png

 

image.thumb.png.cde8a2cfca2ee48fa338575907ba03ee.png

 

I think in my case it works because the kernel already has some GPU with 3E9x values

Don't know if it is so easy to make it works with 10th gen CPUs not existing at all in default kernel.

image.thumb.png.56eecc974560f4032e431805b044cb7a.png

 

image.thumb.png.b91baf2cffaa3f3c539b998ee6a5c744.png

Edited by Orphée
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15 minutes ago, Orphée said:

Where did you read it please ? I could try it.

I ve read it in here in dva3221 someone suggested they did spoof nvidia gpu device id some time ago, also have read on reddit people did it with qemu/kvm also in proxmox forums but personally never tried it so if you have free time at the moment you can play with it:

https://forum.proxmox.com/threads/help-needed-spoofing-device-id-of-passing-through-gpu-breaks-monitor-connection.121309/

Edited by dimakv2014
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The i915_pciids.h file from geminilake 4.4.180+ kernel :

 

/*
 * Copyright 2013 Intel Corporation
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */
#ifndef _I915_PCIIDS_H
#define _I915_PCIIDS_H

/*
 * A pci_device_id struct {
 *      __u32 vendor, device;
 *      __u32 subvendor, subdevice;
 *      __u32 class, class_mask;
 *      kernel_ulong_t driver_data;
 * };
 * Don't use C99 here because "class" is reserved and we want to
 * give userspace flexibility.
 */
#define INTEL_VGA_DEVICE(id, info) {            \
        0x8086, id,                             \
        ~0, ~0,                                 \
        0x030000, 0xff0000,                     \
        (unsigned long) info }

#define INTEL_QUANTA_VGA_DEVICE(info) {         \
        0x8086, 0x16a,                          \
        0x152d, 0x8990,                         \
        0x030000, 0xff0000,                     \
        (unsigned long) info }

#define INTEL_I810_IDS(info)                                    \
        INTEL_VGA_DEVICE(0x7121, info), /* I810 */              \
        INTEL_VGA_DEVICE(0x7123, info), /* I810_DC100 */        \
        INTEL_VGA_DEVICE(0x7125, info)  /* I810_E */

#define INTEL_I815_IDS(info)                                    \
        INTEL_VGA_DEVICE(0x1132, info)  /* I815*/

#define INTEL_I830_IDS(info)                            \
        INTEL_VGA_DEVICE(0x3577, info)

#define INTEL_I845G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2562, info)

#define INTEL_I85X_IDS(info)                            \
        INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \
        INTEL_VGA_DEVICE(0x358e, info)

#define INTEL_I865G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2572, info) /* I865_G */

#define INTEL_I915G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \
        INTEL_VGA_DEVICE(0x258a, info)  /* E7221_G */

#define INTEL_I915GM_IDS(info)                          \
        INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */

#define INTEL_I945G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2772, info) /* I945_G */

#define INTEL_I945GM_IDS(info)                          \
        INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \
        INTEL_VGA_DEVICE(0x27ae, info)  /* I945_GME */

#define INTEL_I965G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */   \
        INTEL_VGA_DEVICE(0x2982, info), /* G35_G */     \
        INTEL_VGA_DEVICE(0x2992, info), /* I965_Q */    \
        INTEL_VGA_DEVICE(0x29a2, info)  /* I965_G */

#define INTEL_G33_IDS(info)                             \
        INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \
        INTEL_VGA_DEVICE(0x29c2, info), /* G33_G */ \
        INTEL_VGA_DEVICE(0x29d2, info)  /* Q33_G */

#define INTEL_I965GM_IDS(info)                          \
        INTEL_VGA_DEVICE(0x2a02, info), /* I965_GM */ \
        INTEL_VGA_DEVICE(0x2a12, info)  /* I965_GME */

#define INTEL_GM45_IDS(info)                            \
        INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */

#define INTEL_G45_IDS(info)                             \
        INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \
        INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \
        INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \
        INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \
        INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
        INTEL_VGA_DEVICE(0x2e92, info)  /* B43_G.1 */

#define INTEL_PINEVIEW_IDS(info)                        \
        INTEL_VGA_DEVICE(0xa001, info),                 \
        INTEL_VGA_DEVICE(0xa011, info)

#define INTEL_IRONLAKE_D_IDS(info) \
        INTEL_VGA_DEVICE(0x0042, info)

#define INTEL_IRONLAKE_M_IDS(info) \
        INTEL_VGA_DEVICE(0x0046, info)

#define INTEL_SNB_D_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0102, info), \
        INTEL_VGA_DEVICE(0x010A, info)

#define INTEL_SNB_D_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0112, info), \
        INTEL_VGA_DEVICE(0x0122, info)

#define INTEL_SNB_D_IDS(info) \
        INTEL_SNB_D_GT1_IDS(info), \
        INTEL_SNB_D_GT2_IDS(info)

#define INTEL_SNB_M_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0106, info)

#define INTEL_SNB_M_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0116, info), \
        INTEL_VGA_DEVICE(0x0126, info)

#define INTEL_SNB_M_IDS(info) \
        INTEL_SNB_M_GT1_IDS(info), \
        INTEL_SNB_M_GT2_IDS(info)

#define INTEL_IVB_M_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */

#define INTEL_IVB_M_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */

#define INTEL_IVB_M_IDS(info) \
        INTEL_IVB_M_GT1_IDS(info), \
        INTEL_IVB_M_GT2_IDS(info)

#define INTEL_IVB_D_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \
        INTEL_VGA_DEVICE(0x015a, info)  /* GT1 server */

#define INTEL_IVB_D_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \
        INTEL_VGA_DEVICE(0x016a, info)  /* GT2 server */

#define INTEL_IVB_D_IDS(info) \
        INTEL_IVB_D_GT1_IDS(info), \
        INTEL_IVB_D_GT2_IDS(info)

#define INTEL_IVB_Q_IDS(info) \
        INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */

#define INTEL_HSW_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
        INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \
        INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
        INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
        INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
        INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
        INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
        INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
        INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
        INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0D06, info)  /* CRW GT1 mobile */

#define INTEL_HSW_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
        INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \
        INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
        INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
        INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
        INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
        INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
        INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
        INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
        INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */

#define INTEL_HSW_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
        INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \
        INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
        INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
        INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
        INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
        INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
        INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
        INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
        INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
        INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
        INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */

#define INTEL_HSW_IDS(info) \
        INTEL_HSW_GT1_IDS(info), \
        INTEL_HSW_GT2_IDS(info), \
        INTEL_HSW_GT3_IDS(info)

#define INTEL_VLV_IDS(info) \
        INTEL_VGA_DEVICE(0x0f30, info), \
        INTEL_VGA_DEVICE(0x0f31, info), \
        INTEL_VGA_DEVICE(0x0f32, info), \
        INTEL_VGA_DEVICE(0x0f33, info), \
        INTEL_VGA_DEVICE(0x0157, info), \
        INTEL_VGA_DEVICE(0x0155, info)

#define INTEL_BDW_GT1_IDS(info)  \
        INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
        INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
        INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
        INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
        INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
        INTEL_VGA_DEVICE(0x160D, info)  /* GT1 Workstation */

#define INTEL_BDW_GT2_IDS(info)  \
        INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */  \
        INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
        INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
        INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \
        INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
        INTEL_VGA_DEVICE(0x161D, info)  /* GT2 Workstation */

#define INTEL_BDW_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
        INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
        INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
        INTEL_VGA_DEVICE(0x162E, info),  /* ULX */\
        INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
        INTEL_VGA_DEVICE(0x162D, info)  /* Workstation */

#define INTEL_BDW_RSVD_IDS(info) \
        INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
        INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
        INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
        INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \
        INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
        INTEL_VGA_DEVICE(0x163D, info)  /* Workstation */

#define INTEL_BDW_IDS(info) \
        INTEL_BDW_GT1_IDS(info), \
        INTEL_BDW_GT2_IDS(info), \
        INTEL_BDW_GT3_IDS(info), \
        INTEL_BDW_RSVD_IDS(info)

#define INTEL_CHV_IDS(info) \
        INTEL_VGA_DEVICE(0x22b0, info), \
        INTEL_VGA_DEVICE(0x22b1, info), \
        INTEL_VGA_DEVICE(0x22b2, info), \
        INTEL_VGA_DEVICE(0x22b3, info)

#define INTEL_SKL_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
        INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
        INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
        INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
        INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */

#define INTEL_SKL_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
        INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
        INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \
        INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
        INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */

#define INTEL_SKL_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
        INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */

#define INTEL_SKL_GT4_IDS(info) \
        INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
        INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4 */ \
        INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4 */ \
        INTEL_VGA_DEVICE(0x192A, info), /* SRV GT4 */ \
        INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */

#define INTEL_SKL_IDS(info)      \
        INTEL_SKL_GT1_IDS(info), \
        INTEL_SKL_GT2_IDS(info), \
        INTEL_SKL_GT3_IDS(info), \
        INTEL_SKL_GT4_IDS(info)

#define INTEL_BXT_IDS(info) \
        INTEL_VGA_DEVICE(0x0A84, info), \
        INTEL_VGA_DEVICE(0x1A84, info), \
        INTEL_VGA_DEVICE(0x1A85, info), \
        INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
        INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */

#define INTEL_GLK_IDS(info) \
        INTEL_VGA_DEVICE(0x3184, info), \
        INTEL_VGA_DEVICE(0x3185, info)

#define INTEL_KBL_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
        INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
        INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
        INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
        INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
        INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
        INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
        INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */

#define INTEL_KBL_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
        INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
        INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
        INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
        INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
        INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */

#define INTEL_KBL_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */

#define INTEL_KBL_GT4_IDS(info) \
        INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */

#define INTEL_KBL_IDS(info) \
        INTEL_KBL_GT1_IDS(info), \
        INTEL_KBL_GT2_IDS(info), \
        INTEL_KBL_GT3_IDS(info), \
        INTEL_KBL_GT4_IDS(info)

/* CFL S */
#define INTEL_CFL_S_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
        INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
        INTEL_VGA_DEVICE(0x3E99, info)  /* SRV GT1 */

#define INTEL_CFL_S_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x3E9A, info)  /* SRV GT2 */

/* CFL H */
#define INTEL_CFL_H_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */

/* CFL U GT1 */
#define INTEL_CFL_U_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x3EA1, info), \
        INTEL_VGA_DEVICE(0x3EA4, info)

/* CFL U GT2 */
#define INTEL_CFL_U_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3EA0, info), \
        INTEL_VGA_DEVICE(0x3EA3, info), \
        INTEL_VGA_DEVICE(0x3EA9, info)

/* CFL U GT3 */
#define INTEL_CFL_U_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */

#define INTEL_CFL_IDS(info)        \
        INTEL_CFL_S_GT1_IDS(info), \
        INTEL_CFL_S_GT2_IDS(info), \
        INTEL_CFL_H_GT2_IDS(info), \
        INTEL_CFL_U_GT1_IDS(info), \
        INTEL_CFL_U_GT2_IDS(info), \
        INTEL_CFL_U_GT3_IDS(info)

/* CNL U 2+2 */
#define INTEL_CNL_U_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x5A52, info), \
        INTEL_VGA_DEVICE(0x5A5A, info), \
        INTEL_VGA_DEVICE(0x5A42, info), \
        INTEL_VGA_DEVICE(0x5A4A, info)

/* CNL Y 2+2 */
#define INTEL_CNL_Y_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x5A51, info), \
        INTEL_VGA_DEVICE(0x5A59, info), \
        INTEL_VGA_DEVICE(0x5A41, info), \
        INTEL_VGA_DEVICE(0x5A49, info), \
        INTEL_VGA_DEVICE(0x5A71, info), \
        INTEL_VGA_DEVICE(0x5A79, info)

#define INTEL_CNL_IDS(info) \
        INTEL_CNL_U_GT2_IDS(info), \
        INTEL_CNL_Y_GT2_IDS(info)

#endif /* _I915_PCIIDS_H */

 

As my CPU is originally a 3E98,

From the doc here https://dgpu-docs.intel.com/devices/hardware-table.html

It seems to be the same as 3E91 or 3E92

 

So seems to be "plug and play" to fake Device ID in my case.

I guess as long as you are able to spoof one of the IDs in the list above... it may work :)

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1 minute ago, Orphée said:

The i915_pciids.h file from geminilake 4.4.180+ kernel :

 

/*
 * Copyright 2013 Intel Corporation
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */
#ifndef _I915_PCIIDS_H
#define _I915_PCIIDS_H

/*
 * A pci_device_id struct {
 *      __u32 vendor, device;
 *      __u32 subvendor, subdevice;
 *      __u32 class, class_mask;
 *      kernel_ulong_t driver_data;
 * };
 * Don't use C99 here because "class" is reserved and we want to
 * give userspace flexibility.
 */
#define INTEL_VGA_DEVICE(id, info) {            \
        0x8086, id,                             \
        ~0, ~0,                                 \
        0x030000, 0xff0000,                     \
        (unsigned long) info }

#define INTEL_QUANTA_VGA_DEVICE(info) {         \
        0x8086, 0x16a,                          \
        0x152d, 0x8990,                         \
        0x030000, 0xff0000,                     \
        (unsigned long) info }

#define INTEL_I810_IDS(info)                                    \
        INTEL_VGA_DEVICE(0x7121, info), /* I810 */              \
        INTEL_VGA_DEVICE(0x7123, info), /* I810_DC100 */        \
        INTEL_VGA_DEVICE(0x7125, info)  /* I810_E */

#define INTEL_I815_IDS(info)                                    \
        INTEL_VGA_DEVICE(0x1132, info)  /* I815*/

#define INTEL_I830_IDS(info)                            \
        INTEL_VGA_DEVICE(0x3577, info)

#define INTEL_I845G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2562, info)

#define INTEL_I85X_IDS(info)                            \
        INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \
        INTEL_VGA_DEVICE(0x358e, info)

#define INTEL_I865G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2572, info) /* I865_G */

#define INTEL_I915G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \
        INTEL_VGA_DEVICE(0x258a, info)  /* E7221_G */

#define INTEL_I915GM_IDS(info)                          \
        INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */

#define INTEL_I945G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2772, info) /* I945_G */

#define INTEL_I945GM_IDS(info)                          \
        INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \
        INTEL_VGA_DEVICE(0x27ae, info)  /* I945_GME */

#define INTEL_I965G_IDS(info)                           \
        INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */   \
        INTEL_VGA_DEVICE(0x2982, info), /* G35_G */     \
        INTEL_VGA_DEVICE(0x2992, info), /* I965_Q */    \
        INTEL_VGA_DEVICE(0x29a2, info)  /* I965_G */

#define INTEL_G33_IDS(info)                             \
        INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \
        INTEL_VGA_DEVICE(0x29c2, info), /* G33_G */ \
        INTEL_VGA_DEVICE(0x29d2, info)  /* Q33_G */

#define INTEL_I965GM_IDS(info)                          \
        INTEL_VGA_DEVICE(0x2a02, info), /* I965_GM */ \
        INTEL_VGA_DEVICE(0x2a12, info)  /* I965_GME */

#define INTEL_GM45_IDS(info)                            \
        INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */

#define INTEL_G45_IDS(info)                             \
        INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \
        INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \
        INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \
        INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \
        INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
        INTEL_VGA_DEVICE(0x2e92, info)  /* B43_G.1 */

#define INTEL_PINEVIEW_IDS(info)                        \
        INTEL_VGA_DEVICE(0xa001, info),                 \
        INTEL_VGA_DEVICE(0xa011, info)

#define INTEL_IRONLAKE_D_IDS(info) \
        INTEL_VGA_DEVICE(0x0042, info)

#define INTEL_IRONLAKE_M_IDS(info) \
        INTEL_VGA_DEVICE(0x0046, info)

#define INTEL_SNB_D_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0102, info), \
        INTEL_VGA_DEVICE(0x010A, info)

#define INTEL_SNB_D_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0112, info), \
        INTEL_VGA_DEVICE(0x0122, info)

#define INTEL_SNB_D_IDS(info) \
        INTEL_SNB_D_GT1_IDS(info), \
        INTEL_SNB_D_GT2_IDS(info)

#define INTEL_SNB_M_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0106, info)

#define INTEL_SNB_M_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0116, info), \
        INTEL_VGA_DEVICE(0x0126, info)

#define INTEL_SNB_M_IDS(info) \
        INTEL_SNB_M_GT1_IDS(info), \
        INTEL_SNB_M_GT2_IDS(info)

#define INTEL_IVB_M_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */

#define INTEL_IVB_M_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */

#define INTEL_IVB_M_IDS(info) \
        INTEL_IVB_M_GT1_IDS(info), \
        INTEL_IVB_M_GT2_IDS(info)

#define INTEL_IVB_D_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \
        INTEL_VGA_DEVICE(0x015a, info)  /* GT1 server */

#define INTEL_IVB_D_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \
        INTEL_VGA_DEVICE(0x016a, info)  /* GT2 server */

#define INTEL_IVB_D_IDS(info) \
        INTEL_IVB_D_GT1_IDS(info), \
        INTEL_IVB_D_GT2_IDS(info)

#define INTEL_IVB_Q_IDS(info) \
        INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */

#define INTEL_HSW_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
        INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \
        INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
        INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
        INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
        INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
        INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
        INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
        INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
        INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0D06, info)  /* CRW GT1 mobile */

#define INTEL_HSW_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
        INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \
        INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
        INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
        INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
        INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
        INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
        INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
        INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
        INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */

#define INTEL_HSW_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
        INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \
        INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
        INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
        INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
        INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
        INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
        INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
        INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
        INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
        INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
        INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */

#define INTEL_HSW_IDS(info) \
        INTEL_HSW_GT1_IDS(info), \
        INTEL_HSW_GT2_IDS(info), \
        INTEL_HSW_GT3_IDS(info)

#define INTEL_VLV_IDS(info) \
        INTEL_VGA_DEVICE(0x0f30, info), \
        INTEL_VGA_DEVICE(0x0f31, info), \
        INTEL_VGA_DEVICE(0x0f32, info), \
        INTEL_VGA_DEVICE(0x0f33, info), \
        INTEL_VGA_DEVICE(0x0157, info), \
        INTEL_VGA_DEVICE(0x0155, info)

#define INTEL_BDW_GT1_IDS(info)  \
        INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
        INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
        INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
        INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
        INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
        INTEL_VGA_DEVICE(0x160D, info)  /* GT1 Workstation */

#define INTEL_BDW_GT2_IDS(info)  \
        INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */  \
        INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
        INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
        INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \
        INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
        INTEL_VGA_DEVICE(0x161D, info)  /* GT2 Workstation */

#define INTEL_BDW_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
        INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
        INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
        INTEL_VGA_DEVICE(0x162E, info),  /* ULX */\
        INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
        INTEL_VGA_DEVICE(0x162D, info)  /* Workstation */

#define INTEL_BDW_RSVD_IDS(info) \
        INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
        INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
        INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
        INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \
        INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
        INTEL_VGA_DEVICE(0x163D, info)  /* Workstation */

#define INTEL_BDW_IDS(info) \
        INTEL_BDW_GT1_IDS(info), \
        INTEL_BDW_GT2_IDS(info), \
        INTEL_BDW_GT3_IDS(info), \
        INTEL_BDW_RSVD_IDS(info)

#define INTEL_CHV_IDS(info) \
        INTEL_VGA_DEVICE(0x22b0, info), \
        INTEL_VGA_DEVICE(0x22b1, info), \
        INTEL_VGA_DEVICE(0x22b2, info), \
        INTEL_VGA_DEVICE(0x22b3, info)

#define INTEL_SKL_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
        INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
        INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
        INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
        INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */

#define INTEL_SKL_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
        INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
        INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \
        INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
        INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */

#define INTEL_SKL_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
        INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */

#define INTEL_SKL_GT4_IDS(info) \
        INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
        INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4 */ \
        INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4 */ \
        INTEL_VGA_DEVICE(0x192A, info), /* SRV GT4 */ \
        INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */

#define INTEL_SKL_IDS(info)      \
        INTEL_SKL_GT1_IDS(info), \
        INTEL_SKL_GT2_IDS(info), \
        INTEL_SKL_GT3_IDS(info), \
        INTEL_SKL_GT4_IDS(info)

#define INTEL_BXT_IDS(info) \
        INTEL_VGA_DEVICE(0x0A84, info), \
        INTEL_VGA_DEVICE(0x1A84, info), \
        INTEL_VGA_DEVICE(0x1A85, info), \
        INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
        INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */

#define INTEL_GLK_IDS(info) \
        INTEL_VGA_DEVICE(0x3184, info), \
        INTEL_VGA_DEVICE(0x3185, info)

#define INTEL_KBL_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
        INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
        INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
        INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
        INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
        INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
        INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
        INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */

#define INTEL_KBL_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
        INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
        INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
        INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
        INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
        INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */

#define INTEL_KBL_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */

#define INTEL_KBL_GT4_IDS(info) \
        INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */

#define INTEL_KBL_IDS(info) \
        INTEL_KBL_GT1_IDS(info), \
        INTEL_KBL_GT2_IDS(info), \
        INTEL_KBL_GT3_IDS(info), \
        INTEL_KBL_GT4_IDS(info)

/* CFL S */
#define INTEL_CFL_S_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
        INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
        INTEL_VGA_DEVICE(0x3E99, info)  /* SRV GT1 */

#define INTEL_CFL_S_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x3E9A, info)  /* SRV GT2 */

/* CFL H */
#define INTEL_CFL_H_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */

/* CFL U GT1 */
#define INTEL_CFL_U_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x3EA1, info), \
        INTEL_VGA_DEVICE(0x3EA4, info)

/* CFL U GT2 */
#define INTEL_CFL_U_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3EA0, info), \
        INTEL_VGA_DEVICE(0x3EA3, info), \
        INTEL_VGA_DEVICE(0x3EA9, info)

/* CFL U GT3 */
#define INTEL_CFL_U_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */

#define INTEL_CFL_IDS(info)        \
        INTEL_CFL_S_GT1_IDS(info), \
        INTEL_CFL_S_GT2_IDS(info), \
        INTEL_CFL_H_GT2_IDS(info), \
        INTEL_CFL_U_GT1_IDS(info), \
        INTEL_CFL_U_GT2_IDS(info), \
        INTEL_CFL_U_GT3_IDS(info)

/* CNL U 2+2 */
#define INTEL_CNL_U_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x5A52, info), \
        INTEL_VGA_DEVICE(0x5A5A, info), \
        INTEL_VGA_DEVICE(0x5A42, info), \
        INTEL_VGA_DEVICE(0x5A4A, info)

/* CNL Y 2+2 */
#define INTEL_CNL_Y_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x5A51, info), \
        INTEL_VGA_DEVICE(0x5A59, info), \
        INTEL_VGA_DEVICE(0x5A41, info), \
        INTEL_VGA_DEVICE(0x5A49, info), \
        INTEL_VGA_DEVICE(0x5A71, info), \
        INTEL_VGA_DEVICE(0x5A79, info)

#define INTEL_CNL_IDS(info) \
        INTEL_CNL_U_GT2_IDS(info), \
        INTEL_CNL_Y_GT2_IDS(info)

#endif /* _I915_PCIIDS_H */

 

As my CPU is originally a 3E98,

From the doc here https://dgpu-docs.intel.com/devices/hardware-table.html

It seems to be the same as 3E91 or 3E92

 

So seems to be "plug and play" to fake Device ID in my case.

I guess as long as you are able to spoof one of the IDs in the list above... it may work :)

Or we can just ask gpt to edit default drivers in synology to add newer device ids :)

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New chat: 

 

To add new Intel PCI device IDs in the Synology DVA1622 driver, you will need to perform the following steps:

 

Download and extract the Linux kernel source code for Synology DSM from Synology's website.

 

Navigate to the drivers directory located in the extracted source code. The path should be similar to the following: synology-linux/drivers/

 

Locate the file synology_dva1622.c inside the pci subdirectory. This file contains the code for the Synology DVA1622 driver.

 

Open the synology_dva1622.c file using a text editor.

 

Locate the following section of code in the file:

 

static const struct pci_device_id synology_dva1622_pci_tbl[] = {

    {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0a0c)},

    {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0a0d)},

    {0},

};

 

Add the new Intel PCI device IDs inside the synology_dva1622_pci_tbl array. Each new device ID should be enclosed in braces and end with a comma. For example:

 

static const struct pci_device_id synology_dva1622_pci_tbl[] = {

    {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0a0c)},

    {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0a0d)},

    {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1234)},

    {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5678)},

    {0},

};

Save the changes to the synology_dva1622.c file.

 

Open a terminal window and navigate to the root directory of the Synology DSM source code.

 

Run the following command to compile the Synology DVA1622 driver:

 

bash

Copy code

make modules M=drivers/pci/

Wait for the compilation process to finish. If there are no errors, the new Synology DVA1622 driver with the added Intel PCI device IDs will be located in the drivers/pci directory.

 

Copy the new driver file to your Synology DVA1622 device, and install it according to the manufacturer's instructions.

 

Note: Before making any changes to the Linux kernel source code, it's important to make a backup of the original files in case something goes wrong during the compilation process.

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Honestly I was able to recompile i915 module with just added missing 3E98 for my case.

Quote

#define INTEL_CFL_S_GT2_IDS(info) \

INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \

INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \

INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \

INTEL_VGA_DEVICE(0x3E98, info), /* SRV GT2 */ \

INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */

It worked and module was loaded. I was able to HW transcode, but still, Surveillance Station AI was crashing.

 

I think it is not just a missing module issue, but also inside some Surveillance Station DLLs ...

Edited by Orphée
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