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Vileserver last won the day on November 6 2018

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About Vileserver

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  1. Oh, that's great that you shared your code on GitHub. Thank you! What a good idea. There is a version 6? It looks like the latest version is 5.2, no? Thanks again for your work
  2. Thanks, John - it was actually really easy to do, USB drives show up in the DSM interface, the SATA attached drive appeared in the HDD list. Then I was able to use File Station with drag and drop.
  3. So maybe, yet another reason to just distribute in shell script format? I think all XPEnology users are smart enough to run a script. And: less work for you, less secrecy, more compatibility with DSM versions... Thank you for all that you do.
  4. You don't even need a login for a serial connection. Assuming you are using the right correction parameters, the output should just dump to your screen.
  5. OK. And you're encrypting this why, again? Because you are worried someone will steal your code?
  6. So what exactly are you using to make a binary executable from a shell script? I thought, if it is a proper executable then it doesn't need /bin/bash? Thank you for your code
  7. Also: Why does a compile script need to find the bash executable? I thought FOXBI was using the compile to make it easier to run... I still think source script (.sh) is easier, and better for sharing. Open source XPEnology
  8. Hi, I'm trying to connect to my bare metal XPenology box (Intel C236 board) via the serial port. I'm hooking it up to my PC's COM1. I am using a null modem cable, which is correct, right? I am connecting with PuTTY using the recommended settings. But when I reboot I only get garbage showing up in the console: ▒▒▒ Using Jun's loader, version 1.03b. Everything comes up fine, I'm just wondering why the serial output isn't working. Has anyone managed to get it running in a similar setup?
  9. Thank you FOXBI. As always, I am looking forward to the bash source of your script!
  10. You can actually get the number of CPU cores in just one line, like this: grep '^cpu cores' /proc/cpuinfo | uniq | awk '{print $4}' This works for CPUs that have hyper-threading. There are some more interesting methods discussed here:
  11. Fantastic! Thanks FOXBI. Any chance you can also post the shell script? I think most users here prefer the bash source. Thanks
  12. OK, here is a slightly updated version, I call it 4.01. Fixes: improve CPU core determination fix color output fix typos Thanks again to FOXBI for this great script! I hope you don't mind me making some small changes to it. gericb, does this work for you?
  13. Before I ran FOXBI's script, the specs said 4 cores for Xeon D-1527, which is the CPU in the DS3617xs: Note this is the number of cores, NOT threads which would be 8 for this CPU! Check Intel's datasheet here. So DSM is always meant to show physical cores, not logical ones. Therefore this is a small bug in the script....
  14. You have nothing to be embarrassed about, FOXBI! Your code is much more elegant than some of my bash scripts 감사합니다 !! Unfortunately, it still doesn't quite work for me - it recognizes my Core i3-6100T (specs) correctly, but it says I have 4 CPU cores: when in fact there are only 2. I am not sure why it thinks so, the commands get it right: # dmidecode -t processor # dmidecode 2.12 SMBIOS 3.0 present. # SMBIOS implementations newer than version 2.7 are not # fully supported by this version of dmidecode. Handle 0x000C, DMI type 4, 48 bytes Processor Information Socket Designation: CPUSocket Type: Central Processor Family: Core i3 Manufacturer: Intel(R) Corporation ID: E3 06 05 00 FF FB EB BF Signature: Type 0, Family 6, Model 94, Stepping 3 Flags: FPU (Floating-point unit on-chip) VME (Virtual mode extension) DE (Debugging extension) PSE (Page size extension) TSC (Time stamp counter) MSR (Model specific registers) PAE (Physical address extension) MCE (Machine check exception) CX8 (CMPXCHG8 instruction supported) APIC (On-chip APIC hardware supported) SEP (Fast system call) MTRR (Memory type range registers) PGE (Page global enable) MCA (Machine check architecture) CMOV (Conditional move instruction supported) PAT (Page attribute table) PSE-36 (36-bit page size extension) CLFSH (CLFLUSH instruction supported) DS (Debug store) ACPI (ACPI supported) MMX (MMX technology supported) FXSR (FXSAVE and FXSTOR instructions supported) SSE (Streaming SIMD extensions) SSE2 (Streaming SIMD extensions 2) SS (Self-snoop) HTT (Multi-threading) TM (Thermal monitor supported) PBE (Pending break enabled) Version: Intel(R) Core(TM) i3-6100T CPU @ 3.20GHz Voltage: 1.1 V External Clock: 100 MHz Max Speed: 3200 MHz Current Speed: 3200 MHz Status: Populated, Enabled Upgrade: Other L1 Cache Handle: 0x0009 L2 Cache Handle: 0x000A L3 Cache Handle: 0x000B Serial Number: To Be Filled By O.E.M. Asset Tag: To Be Filled By O.E.M. Part Number: To Be Filled By O.E.M. Core Count: 2 Core Enabled: 2 Thread Count: 4 Characteristics: 64-bit capable Multi-Core Hardware Thread Execute Protection Enhanced Virtualization Power/Performance Control # cat /proc/cpuinfo processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 94 model name : Intel(R) Core(TM) i3-6100T CPU @ 3.20GHz stepping : 3 microcode : 0xc2 cpu MHz : 3101.000 cache size : 3072 KB physical id : 0 siblings : 4 core id : 0 cpu cores : 2 apicid : 0 initial apicid : 0 fpu : yes fpu_exception : yes cpuid level : 22 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb xsaveopt pln pts invpcid_single spec_ctrl ibpb_support tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid rdseed adx smap bogomips : 6384.58 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: Maybe your code is confusing number of threads with number of cores? Thanks again